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ArchitectureRegister Organization

📦 Register Organization

Understand the different types of CPU registers, their purposes, and how they work together to execute instructions efficiently.

What are CPU Registers?

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Fastest Memory in the System

Registers are small, ultra-fast storage locations inside the CPU. They hold data, addresses, and control information. Register access is typically 0.5-1 cycle, compared to 4-75 cycles for L1 cache and hundreds for main memory.

CPU registers are categorized into two broad types: programmer-visible (general-purpose and special-purpose) and internal (temporary storage used during execution).

Types of Registers

Status Register / Flags

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Condition Code Register (CCR)

The status register holds individual flag bits that reflect the result of ALU operations. These flags are checked by conditional branch instructions to implement if-else, loops, and comparisons.

Z (Zero)

Set when ALU result is zero

C (Carry)

Set when addition produces a carry out or subtraction needs a borrow

N (Negative)

Set when ALU result is negative (MSB = 1)

V (Overflow)

Set when signed arithmetic overflows

Register File Architecture

MIPS Register File (32 × 32-bit)

R0R0 ($zero): Always zero
R1R1-R3 ($at-$v1): Assembler temp, function results
R2R4-R7 ($a0-$a3): Function arguments
R3R8-R15 ($t0-$t7): Temporary (caller-saved)
R4R16-R23 ($s0-$s7): Saved (callee-saved)
R5R24-R25 ($t8-$t9): More temporaries
R6R26-R27 ($k0-$k1): Kernel reserved
R7R28 ($gp): Global pointer
R8R29 ($sp): Stack pointer
R9R30 ($fp): Frame pointer
R10R31 ($ra): Return address
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Register Convention

MIPS convention divides the 32 registers into categories: caller-saved (t0-t9) and callee-saved (s0-s7). Caller-saved registers must be saved by the calling function, while callee-saved are preserved by the called function.

Register Windows (SPARC Architecture)

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SPARC Innovation

SPARC uses overlapping register windows to speed up function calls. Instead of saving/restoring registers on every call, the CPU rotates to a fresh set of registers, passing parameters through overlapping windows.

N

Number of windows (typically 8-32)

M

Number of global registers (typically 8-16)

C

Registers per window (typically 24-32)

Overlapping

Adjacent windows share registers for parameter passing

Register Usage Code Example

mips

# MIPS register usage example
# Function: sum array elements
# a0 = array pointer, a1 = count
# v0 = return value (sum)

sum_array:
    li   $v0, 0           # sum = 0
    li   $t0, 0           # i = 0
loop:
    beq  $t0, $a1, done   # if i == count, done
    sll  $t1, $t0, 2      # t1 = i * 4 (byte offset)
    add  $t2, $a0, $t1    # t2 = &array[i]
    lw   $t3, 0($t2)      # t3 = array[i]
    add  $v0, $v0, $t3    # sum += array[i]
    addi $t0, $t0, 1      # i++
    j    loop
done:
    jr   $ra              # return to caller
Key: $v0/$v1 = return values, $a0-$a3 = arguments, $t0-$t9 = temporaries, $s0-$s7 = saved registers, $sp = stack pointer, $ra = return address.

Interview Questions

What is the difference between general-purpose and special-purpose registers?

General-purpose registers (GPRs) can hold either data or addresses and are used by arithmetic/logic instructions. Special-purpose registers like PC, IR, MAR, and MDR have dedicated roles: PC tracks the next instruction, IR holds the current instruction, MAR holds memory addresses, and MDR buffers data to/from memory.

Explain register windows in SPARC architecture.

Register windows allow fast context switching by providing multiple overlapping sets of registers. Each window has local registers and shares registers with adjacent windows for parameter passing. The current window pointer (CWP) selects the active window. On function call, the CWP rotates to a new window without saving/loading registers to memory, unless all windows are in use (window overflow trap).

How does the Stack Pointer (SP) work during function calls?

SP points to the most recently pushed item on the stack. On function call: arguments may be pushed, return address is saved, old frame pointer is saved, local variables are allocated (SP decremented). On return: stack is unwound (SP restored), return address loaded, and execution resumes.

What are condition code flags and how are they used?

Flags like Zero (Z), Carry (C), Negative (N), and Overflow (V) are set by ALU operations and stored in the status register. Conditional branch instructions (e.g., BEQ, BNE) check these flags to make decisions. For example, BEQ branches if Z=1 (last result was zero).