đ Computer Architecture Fundamentals
Understand the basic principles of how computers work: Von Neumann architecture, Harvard architecture, and the fundamental components that make up a computer system.
What is Computer Architecture?
Definition
Hardware Organization
Physical layout and interconnection of components
Instruction Set
Set of commands CPU can execute
Memory System
How memory is organized and accessed
I/O System
How CPU communicates with peripherals
Von Neumann Architecture
Key Concept
Von Neumann Architecture Components
CPU
Executes instructions
Memory
Stores data & instructions
I/O
Input/Output devices
Bus
Connects components
Von Neumann Bottleneck
Harvard Architecture
Key Difference
Von Neumann
Advantages:
- â Simple design
- â Less hardware
Limitations:
- â Memory bottleneck
- â Slower
Harvard
Advantages:
- â Parallel access
- â Faster
- â Better cache
Limitations:
- â More complex
- â More expensive
CPU Execution Cycle (Fetch-Execute Cycle)
PC (Program Counter) holds address of next instruction. Instruction is fetched from memory into IR (Instruction Register).
Control Unit decodes the instruction and generates control signals. Operands are identified and fetched if needed.
ALU performs the operation specified by the instruction. This might be arithmetic, logic, or data movement.
If needed, data is read from or written to memory. Not all instructions need this step.
Result is written back to a register or memory. PC is incremented to point to the next instruction.
Simple CPU Simulator (Python)
python
class CPU:
def __init__(self):
self.registers = [0] * 32
self.pc = 0
self.memory = [0] * 4096
def fetch(self):
instruction = self.memory[self.pc]
self.pc += 1
return instruction
def execute(self, instruction):
opcode = (instruction >> 24) & 0xFF
rd = (instruction >> 16) & 0x1F
rs = (instruction >> 8) & 0x1F
imm = instruction & 0xFF
if opcode == 0: # ADD
self.registers[rd] = self.registers[rs] + imm
elif opcode == 1: # LOAD
self.registers[rd] = self.memory[imm]
elif opcode == 2: # STORE
self.memory[imm] = self.registers[rs]Interview Questions
What is the difference between Von Neumann and Harvard Architecture?
Von Neumann uses a single memory for both instructions and data with one bus, causing the Von Neumann bottleneck. Harvard uses separate memories and buses for instructions and data, allowing simultaneous access but requiring more hardware.
Explain the Fetch-Execute cycle in detail.
The CPU repeatedly: 1) Fetches instruction from memory address in PC, 2) Decodes it in control unit, 3) Executes using ALU, 4) Accesses memory if needed, 5) Writes back results and increments PC.
What is the Von Neumann bottleneck?
The single bus connecting CPU and memory in Von Neumann architecture can only transfer either an instruction or data at a time, not both. This limits throughput, known as the Von Neumann bottleneck.